Optimal Control of Multilevel Flying-Capacitor Converters

This thesis is concerned with the flying-capacitor multilevel power converter topology. This converter is one of several different static power converter circuits which can produce three or more distinct voltage levels at the output terminals. All multilevel converters are constructed from semiconductor power switches which have a lower voltage rating than the maximum terminal voltages, and so are generally used in high power, medium voltage applications. Flying-capacitor converters have internal floating capacitors which provide voltage clamping of the power switches. To ensure correct operation, the internal capacitor voltages have to be at specific balanced levels and this poses a major challenge in the control of the flying-capacitor converter.
The main objective of this work was to investigate the control of a three-phase flying-capacitor inverter, and identify optimal modulation strategies which would improve the output power quality by minimising the harmonic content of the output waveforms. As part of this investigation, suitable capacitor voltage balancing strategies for incorporation within the modulation control system had to be identified. It was also the intention of the work to quantify the effect on performance of different capacitor ratings, in order to provide a definitive guide to selecting components for a practical inverter.
Simulations of various forms of multilevel sinusoidal modulation are presented in the thesis. The modulation schemes covered are selective harmonic elimination (SHE), sine-triangle PWM and space vector PWM. In the flying-capacitor inverter, there are a variety of different implementations possible for each scheme due to the increased number of synthesisable output voltage levels. The relative merits of the different modulators are assessed based on output power quality, and this is done in respect to the novel capacitor voltage balancing strategies developed for each scheme. To aid this investigation, a detailed simulator program has been developed which incorporates realistic models of the inverter system and digital controller.
The investigations into SHE control have revealed that a switching state rotation pattern can be optimally selected to balance the capacitor voltages and actually reduce the harmonic content of the output in the case of practically sized capacitors. System characteristics are presented which can enable the selection of the capacitors based on the load characteristic in order to optimise the performance of the practical inverter.
An in-depth investigation into the various sine-triangle PWM carrier placement options, reference sampling methods and hardware implementation issues known in the literature has been carried out. The results show the effect of the various implementations on output power quality and a comparative assessment is presented in the context of practical sized capacitors. A novel digital hardware-based capacitor voltage balancing control scheme is proposed and shown to work well without the need of voltage sensors on the capacitors.
Space vector PWM is investigated and a very simple approach to computation of the duty cycles using a carrier-based implementation to generate the space vector firing pattern is presented. It is shown to give the same results as more complex algorithms adopted in the past, aimed at the selection of the synthesising vectors from the large number of switching state vectors in the multilevel inverter. The novel PWM balancing strategy ensures that the inverter operates correctly in a balanced state.
An experimental three-phase, five-level inverter has been constructed and used to confirm the validity of the simulation work. Results presented show that the inverter operates correctly, with balanced capacitor voltages, under all forms of sinusoidal modulation control.