Dead Time Compensation and Phase Lag Compensation in 2-Level and 3-Level Grid Connected H-Bridge Power Inverter

Dead Time (T_d) is a certain time which is added into power inverter for avoiding short circuit events when power switches are turning on or off. Although dead time is used in H-Bridge to avoid a shoot-through event from occurring, it will inevitably cause distortion and energy loss. Methods such as Dead Time Compensation (DTC) and Dead Time Elimination (DTE) are used for compensating power loss, voltage drop, and high distortion caused by dead time T_d. In many literatures, most of DTC or DTE are used in 2-level H-Bridge PWM system for motor drives and open-loop system. This thesis presents a DTC technology which is used in a single phase 2-level and 3-level Grid Connected H-Bridge Power Inverter. As result, except DTC technology, the technology of Phase Locked Loop (PLL) and PI current control are described and discussed as well. Moreover, MATLAB Simulink simulation results, and electrical circuit design experimental results about the DTC in Grid Connected Power Inverter presented in the thesis is discussed.