DCD Algorithm: Architectures, FPGA Implementations and Applications

Liu, Jie (2008) DCD Algorithm: Architectures, FPGA Implementations and Applications. PhD thesis, University of York.

Abstract

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Awarding institution: University of York
Academic Units: The University of York > Electronics (York)
Identification Number/EthosID (e.g. uk.bl.ethos.123456): uk.bl.ethos.488739
Depositing User: Dr Yuriy Zakharov
Date Deposited: 02 Sep 2011 15:28
Last Modified: 08 Aug 2013 08:46

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PhD thesis by Jie Liu, Electronics Department, 2008

Filename: PhD_thesis_Jie_Liu.pdf

Description: PhD thesis by Jie Liu, Electronics Department, 2008

Licence: Creative Commons Attribution Non-commercial No Derivatives (UK)

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