Circuit Optimisation using Device Layout Motifs

Xiao, Yang (2015) Circuit Optimisation using Device Layout Motifs. PhD thesis, University of York.

Abstract

Metadata

Supervisors: Tyrrell, Andy and Trefzer, Martin
Awarding institution: University of York
Academic Units: The University of York > Electronics (York)
Identification Number/EthosID: uk.bl.ethos.659058
Depositing User: Dr. Yang Xiao
Date Deposited: 07 Aug 2015 11:18
Last Modified: 08 Sep 2016 13:33

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Circuit Optimisation using Device Layout Motifs

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