Novel design techniques and control schemes for higher efficiency switched-mode power converters

This thesis details novel control schemes and design techniques with the aim of improving the performance of several switched-mode power converter topologies. These improvements include higher steady-state and transient efficiencies for hard-switching converters and the automatic current limiting provision for LLC resonant converters. The thesis initially attempts to use linear closed-loop controllers to improve the transient response of synchronous buck converters, enabling them to be designed with a lower open-loop bandwidth so that the system can achieve higher efficiency. Three types of controllers were investigated viz: the PID, the state-feedback and the predictive controller. All three controllers exhibit similar step responses, which are the maximum transient responses achievable by the linear controllers with the given requirements. The thesis then examines the parallel converter (i.e. a converter with two parallel connected power modules (PMs)) in detail with a view to improve the efficiency and to minimise the current ripple experienced by the output capacitor. Two control schemes and a design technique for the parallel converter are proposed, to simultaneously improve its efficiency and power density. The parallel converter in this research consists of two non-identical rated PMs (termed main PM and auxiliary PM), with the transient response requirement allocated to the auxiliary PM, thereby allowing the main PM to operate at a lower frequency for higher steady-state efficiency. The first control scheme activates the auxiliary PM only when a pre-determined deviation in load/output voltage is exceeded under a load step. Thus, eliminating the losses contributed by the low efficiency auxiliary PM for small load step changes. The second control scheme shapes the auxiliary PM inductor current to be equal and opposite to the main PM current ripple, which when combined reduce the current ripple as experienced by the output filter capacitor, thereby allowing a lower value (and hence physically smaller) capacitor to be selected for higher power density. In order to improve the converter's steady-state efficiency further, the minimum load condition is allocated to the auxiliary PM in the new design technique. These allow both the main PM inductance and its switching frequency to be lower for higher efficiency. In recent years, the LLC has received much attention owing to its favourable operating characteristics including high efficiency and high power density. Usually one chooses to operate at or very close to the load independent point (LIP) since very little control effort is required to regulate the converter's output voltage in response to changes in the load. However under fault conditions where the load tends towards a short circuit, excessive currents can flow and thus control action need to be taken to protect both the converter and the load. The final topic of the thesis hence studies the characteristics of an LLC resonant converter with current-limiting capacitor-diode clamp and develops a new equivalent circuit model to predict the behaviour under overload conditions. A detailed analysis of the converter is presented using the proposed model, from which a design methodology is derived allowing the optimum circuit components to be selected to achieve the required current limiting/protection characteristics.