Development of Planar Indium Arsenide Electron Avalanche Photodiodes with High Gain and Low Timing Jitter

Avalanche photodiodes (APDs) are an excellent detector choice for photon starved applications. For applications which require detection of longer wavelength infrared photons, a wide range of compound semiconductors exist which can provide spectral responses from the near to the far infrared. Indium Arsenide (InAs) is a III-V compound semiconductor which exhibits a spectral response up to ∼3.5 µm at room temperature. InAs APDs exhibit electron-only avalanche multiplication, which places them into a sub-class of very low noise and high speed APDs known as electron APDs (eAPDs).
Notwithstanding these excellent avalanching properties, fabrication of InAs avalanche photodiodes still faces significant challenges such as control of its leakage currents and integration with read-out electronics. Adoption of planar topology InAs eAPDs fabricated using ion implantation has, thus far, proved to be a fruitful endeavour towards addressing these limitations. However, further development of this technology is still required to reduce leakage currents and achieve hybridisation with readout electronics.
Fabrication of high pixel density focal plane arrays (FPAs) of InAs eAPDs requires backside illuminated detectors which can be bump-bonded to readout electronics. To this end, selective n-type doping through implantation of S and Si ions is explored. Both the S and Si implanted mesa detectors exhibited similar dark current densities to previously reported Be implanted detectors. The dark current of the S implanted detectors showed little variation with annealing temperature and, when annealed at 600 °C, exhibited a high 2004 nm responsivity of 1.08 AW−1. Following this, challenges surrounding the fabrication of planar InAs n-i-p diodes are explored through experiment and simulation.
Some wider bandgap III-V compound semiconductors, GaAsSb and AlInAsSb, grown on InAs are explored. Using selective wet chemical etches, these materials are shown to act as etch stop layers, which could aid with substrate removal in fabricating back-side illuminated detectors. Use of AlInAsSb as a passivation and protective layer are also explored to aid with fabrication of InAs eAPDs. Through this exploration it is found that, while the properties of this layer are not currently ideal for use as a passivation layer, it can be used as a protective layer during fabrication. Resulting in 32-pixel detector arrays with low dark current sigma/mean variations of only 4.8 to 6.4 %.
Finally, packaged planar InAs eAPDs are characterised at low temperatures. High gains in excess of 100 are demonstrated along with high 1550 nm responsivities of 0.7 to 0.8 AW−1 without the use of any anti-reflective coatings. It is shown that using a low noise transimpedance amplifier, the avalanche gain in the devices can be exploited to detect very low optical powers corresponding to ∼69 photons per 50 µs laser pulse. The timing jitter properties of the InAs eAPDs are then explored using a picosecond 1550 nm pulsed laser. It is observed that, under an average power of 117 nW and repetition rate of 5 MHz, the measured jitter decreases with increasing gain reaching a minimum value of 3.6 ps which is approaching the system jitter limit imposed by the laser.