Pinchbeck, Joseph (2022) Fabrication of High Speed GaN-based Transistors and DC-to-DC Converters. PhD thesis, University of Sheffield.
Abstract
GaN power devices are an area of research with growing interest due to the material’s superior
intrinsic properties making it a good choice for high frequency high power applications. This
study looks at using a dual metal gate (DMG) structure to improve the transconductance and
reduce short channel effects. The study presents research into how GaN HEMTs can improve
monolithically integrated buck converters and different topologies have been fabricated and
compared.
Several dual gate devices with different gate lengths were fabricated and tested as well as
comparisons with simulations made. Transconductance improvements stemming from the dual
gate structure were demonstrated down to gate lengths of 200nm. Improvements from
216mS/mm to 229mS/mm for a total gate length of 200nm are demonstrated. In addition, short
channel effect reductions, specifically drain induced barrier lowering (DIBL) has been shown
to be greatly reduced with the dual gate metal implementation. Reductions up to 49% are shown
down to total gate lengths of 200nm.
Monolithically integrated buck converters have been demonstrated with both standard and
multilevel topologies compared. High efficiencies of 80% have been demonstrated with the
standard topology shown for 10V, 1MHz operations. Experimental testing has also been
performed at higher voltage, 25V 1MHz and higher frequency 10V 50MHz. Standard, three
level and five level converters have been tested experimentally and the results verified with
simulations. Comparisons show that the five-level topology may be the most suitable for the
highest voltage tested in this study, 25V, and show the highest efficiency at 77.3%.
A study into the effect of the field plate have on the electrical performance of the power
transistors was performed. The source field plate configuration in the GaN power transistors
has been demonstrated to be best option for dynamic Ron suppression and intrinsic gate
capacitance. A increase in device on state resistance by 210% is shown to be reduced to a 20%
increase by the addition of the field plate.
Metadata
Supervisors: | Lee, Kean Boon |
---|---|
Keywords: | GaN; Buck Converter; High Speed; Dual Gate; DMG; Fabrication |
Awarding institution: | University of Sheffield |
Academic Units: | The University of Sheffield > Faculty of Engineering (Sheffield) > Electronic and Electrical Engineering (Sheffield) The University of Sheffield > Faculty of Engineering (Sheffield) |
Identification Number/EthosID: | uk.bl.ethos.871101 |
Depositing User: | Mr Joseph Pinchbeck |
Date Deposited: | 09 Jan 2023 15:46 |
Last Modified: | 01 Mar 2023 10:54 |
Open Archives Initiative ID (OAI ID): | oai:etheses.whiterose.ac.uk:32062 |
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