Operating System (OS) kernels have been under research and development for decades, mainly assuming single processor and distributed hardware systems.
With the recent rise of multi-core chips that may incorporate a network on chip (NoC), new challenges have appeared that were not considered before.
Given that a complete multi-core system that works on a single system on chip (SoC) is now the normal case, different cores on a single SoC may
share other physical resources and data. This new sharing scheme on a SoC affects crucial aspects of an overall system like correctness, performance,
predictability, scalability and security. Both hardware and OSs to flexibly cooperate in order to provide
solutions for such challenges.
SoC mimics the internet somehow now, with different cores acting as computer nodes, and the network medium is given in an advanced digital fabrics like buses or NoCs, that are
a current research area. However, OSs are still assuming some (hardware) features like single physical memory and memory sharing for inter-process communication, page-based protection, cache operations, even when evolving from uniprocessor to multi-core processors.
Such features not only may degrade performance and other system aspects, but also
some of them make no sense for a multi-core SoC, and introduce some barriers and limitations. While new OS research is considering different kernel designs
to cope up with multi-core systems, they are still limited by the current commercial hardware architectures.
The objective of this thesis is to assess different kernel designs and implementations on multi-core hardware architectures.
Part of the contributions of the thesis is porting
RTEMS (RTOS) and seL4 microkernel to Epiphany and RISC-V hardware architectures respectively, trading-off the design and implementation decisions. This hands-on experience gave a better understanding of the real-world challenges regarding kernel designs and implementations.
