Real-Time Operating System Modelling and Simulation Using SystemC

Increasing system complexity and stringent time-to-market pressure bring challenges to the design productivity of real-time embedded systems. Various System-Level Design (SLD), System-Level Design Languages (SLDL) and Transaction-Level Modelling (TLM) approaches have been proposed as enabling tools for real-time embedded system specification, simulation, implementation and verification. SLDL-based Real-Time Operating System (RTOS) modelling and simulation are key methods to understand dynamic scheduling and timing issues in real-time software behavioural simulation during SLD. However, current SLDL-based RTOS simulation approaches do not support real-time software simulation adequately in terms of both functionality and accuracy, e.g., simplistic RTOS functionality or annotation-dependent software time advance.

This thesis is concerned with SystemC-based behavioural modelling and simulation of real-time embedded software, focusing upon RTOSs. The RTOS-centric simulation approach can support flexible, fast and accurate real-time software timing and functional simulation. They can help software designers to undertake real-time software prototyping at early design phases.

The contributions in this thesis are fourfold.

Firstly, we propose a mixed timing real-time software modelling and simulation approach with various timing related techniques, which are suitable for early software modelling and simulation. We show that this approach not only avoids the accuracy drawback in some existing methods but also maintains a high simulation performance.

Secondly, we propose a Live CPU Model to assist software behavioural timing modelling and simulation. It supports interruptible and accurate software timing simulation in SystemC and extends modelling capability of the mixed timing approach for HW/SW interactions.

Thirdly, we propose a RTOS-centric real-time embedded software simulation model. It provides a systematic approach for building modular software (including both application tasks and RTOS) simulation models in SystemC. It flexibly supports mixed timing application task models. The functions and timing overheads of the RTOS model are carefully designed and considered. We show that the RTOS-centric model is both convenient and accurate for real-time software simulation.

Fourthly, we integrate TLM communication interfaces in the software models, which extend the proposed RTOS-centric software simulation model for SW/HW inter-module TLM communication modelling.

As a whole, this thesis focuses on RTOS and real-time software modelling and simulation in the context of SystemC-based SLD and provides guidance to software developers about how to utilise this approach in their real-time software development. The various aspects of research work in this thesis constitute an integrated software Processing Element (PE) model, interoperable with existing TLM hardware and communication modelling.