Hardware Architecture for a Bi-directional Protein Processor Associative Memory

Qadir, Omer (2011) Hardware Architecture for a Bi-directional Protein Processor Associative Memory. PhD thesis, University of York.

Abstract

Metadata

Keywords: Hardware architecture, artificial intelligence, associative memory, bidirectional, heteroassociative, FPGA, verilog
Awarding institution: University of York
Academic Units: The University of York > Electronics (York)
Identification Number/EthosID (e.g. uk.bl.ethos.123456): uk.bl.ethos.547371
Depositing User: Mr Omer Qadir
Date Deposited: 11 Jan 2012 14:59
Last Modified: 08 Sep 2016 12:21

Download

thesis

Filename: thesis.pdf

Licence: Creative Commons Attribution Non-commercial No Derivatives (UK)

Share / Export


You do not need to contact us to get a copy of this thesis. Please use the 'Download' link(s) above to get a copy.
You can contact us about this thesis. If you need to make a general enquiry, please see the Contact us page.